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atmel-8812e-seeprom-at24cm01-datasheet_032013 features ? low voltage and standard voltage operation available ? 1.7v (v cc = 1.7v to 5.5v) ? 2.5v (v cc = 2.5v to 5.5v) ? internally organized 131,072 x 8 ? 2-wire serial interface ? schmitt triggers, filtered inputs for noise suppression ? bidirectional data transfer protocol ? 400khz (1.7v) and 1mhz (5v, 2.5v) compatibility ? write protect pin for hardware data protection ? 256-byte page write mode ? partial page writes allowed ? random and sequential read modes ? self-timed write cycle (5ms max) ? high reliability ? endurance: 1,000,000 write cycles ? data retention: 40 years ? green package options (pb/halide-free/rohs compliant) ? 8-lead jedec soic, 8-lead eiaj soic, 8-lead tssop, and 8-ball wlcsp ? die sale options: wafer form and tape and reel available description the atmel ? at24cm01 provides 1,048,576 bits of serial electrically erasable and programmable read-only memory (eeprom) organized as 131,072 words of eight bits each. the device?s cascadable feature allows up to four devices to share a common 2-wire bus. the device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. the devices are available in space-saving 8-lead jedec soic, 8-lead eiaj soic, 8-lead tssop, and 8-ball wlcsp. in addition, the entire family is available in 1.7v (1.7v to 5.5v) and 2.5v (2.5v to 5.5v) versions. atmel at24cm01 i 2 c-compatible (2-wire) serial eeprom 1-mbit (131,072 x 8) datasheet
2 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 1. pin configurations and pinouts 2. absolute maximum ratings* pin name function nc no connect a 1 address input a 2 address input gnd ground sda serial data scl serial clock input wp write protect v cc power supply 1 2 3 4 8 7 6 5 nc a 1 a 2 gnd v cc wp scl sda 8-lead soic 8-lead tssop top view 1 2 3 4 8 7 6 5 nc a 1 a 2 gnd v cc wp scl sd a top view note: drawings are not to scale. 8-ball wlcsp bottom view v cc wp nc scl a 1 sda a 2 gnd operating temperature . . . . . . . . . . .?55 ? c to +125 ? c storage temperature . . . . . . . . . . . .?65 ? c to +150 ? c voltage on any pin with respect to ground . . . . . . . . . . . . . ?1.0v to +7.0v maximum operating voltage . . . . . . . . . . . . . . . 6.25v dc output current. . . . . . . . . . . . . . . . . . . . . . . 5.0ma *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
3 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 3. block diagram 4. pin description serial clock (scl): the scl input is used to positive edge clock data into each eeprom device and negative edge clock data out of each device. serial data (sda): the sda pin is bidirectional for serial data transfer. this pin is open drain driven and may be wire-ored with any number of other open drain or open collector devices. device addresses (a 2 and a 1 ): the a 2 and a 1 pins are device address inputs that can be hardwired or left not connected for hardware compatibility with other atmel at24cxx devices. when the a 2 and a 1 pins are hardwired, as many as four 1-mbit devices may be addressed on a single bus system ( see ?device addressing? on page 9 for more details). if the a 2 and a 1 pins are left floating, the a 2 and a 1 pin will be internally pulled down to gnd if the capacitive coupling to the circuit board v cc plane is <3pf. if coupling is >3pf, atmel recommends connecting the a 2 and a 1 pin to gnd. write protect (wp): the write protect input, when connected to gnd, allows normal write operations. when wp is connected high to v cc , all write operations to the memory are inhibited. if the pin is left floating, the wp pin will be internally pulled down to gnd if the capacitive coupling to the circuit board v cc plane is <3pf. if coupling is >3pf, atmel recommends connecting the pin to gnd. switching wp to v cc prior to a write operation creates a software write protect function. table 4-1. write protect start stop logic v cc gnd wp scl sda a 2 a 1 serial control logic en h.v. pump/timing eeprom data recovery serial mux x dec d out /ack logic comp load inc data word addr/counter y dec r/w d out d in load device address comparator wp pin status part of the array protected at24cm01 at v cc full array at gnd normal read/write operations
4 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 5. memory organization at24cm01, 1-mbit serial eeprom: the 1-mbit is internally organized as 512 pages of 256 bytes each. random word addressing requires a 17-bit data word address. table 5-1. pin capacitance (1) note: 1. this parameter is characterized and is not 100% tested. table 5-2. dc characteristics note: 1. v il min and v ih max are reference only and are not tested. applicable over recommended operating range from t a = 25 ? c, f = 1.0mhz, v cc = 5.5v symbol test condition max units conditions c i/o input/output capacitance (sda) 8 pf v i/o = 0v c in input capacitance (a 2 , a 1 , scl) 6 pf v in = 0v applicable over recommended operating range from: t ai = ?40c to +85c, v cc = 1.7v to 5.5v (unless otherwise noted) symbol parameter test condition min typ max units v cc1 supply voltage, 1.7v option 1.7 5.5 v v cc2 supply voltage, 2.5v option 2.5 5.5 v i cc supply current v cc = 5.0v read at 400khz 2.0 ma i cc supply current v cc = 5.0v write at 400khz 3.0 ma i sb standby current v cc = 1.7v v in = v cc or v ss 1.0 a v cc = 2.5v 2.0 a v cc = 3.6v v in = v cc or v ss 3.0 a v cc = 5.5v 6.0 a i li input leakage current v in = v cc or v ss 0.10 3.0 a i lo output leakage current v out = v cc or v ss 0.05 3.0 a v il input low level (1) ?0.6 v cc x 0.3 v v ih input high level (1) v cc x 0.7 v cc + 0.5 v v ol1 output low level v cc = 1.7v i ol = 0.15ma 0.2 v v ol2 output low level v cc = 3.0v i ol = 2.1ma 0.4 v
5 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 table 5-3. ac characteristics notes: 1. this parameter is ensured by characterization only. 2. ac measurement conditions: ? r l (connects to v cc ): 1.3 k ? (2.5v, 5v), 10 k ? (1.7v) ? input pulse voltages: 0.3 v cc to 0.7 v cc ? input rise and fall times: ? 50ns ? input and output timing reference voltages: 0.5 v cc applicable over recommended operating range from t ai = -40 ? c to +85 ? c, v cc = 1.7v to 5.5v (where applicable), cl = 100pf (unless otherwise noted). test conditions are listed in note 2 . symbol parameter 1.7v 2.5v, 5.0v units min max min max f scl clock frequency, scl 400 1000 khz t low clock pulse width low 1300 400 ns t high clock pulse width high 600 400 ns t i noise suppression time (1) 100 50 ns t aa clock low to data out valid 50 900 50 550 ns t buf time the bus must be free before a new transmission can start (1) 1300 500 ns t hd.sta start hold time 600 250 ns t su.sta start set-up time 600 250 ns t hd.dat data in hold time 0 0 ns t su.dat data in set-up time 100 100 ns t r inputs rise time (1) 300 300 ns t f inputs fall time (1) 300 100 ns t su.sto stop set-up time 600 250 ns t dh data out hold time 50 50 ns t wr write cycle time 5 5 ms endurance (1) 25c, page mode, 3.3v 1,000,000 write cycles
6 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 6. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods (see figure 6-4 on page 8 ). data changes during scl high periods will indicate a start or stop condition as defined below. start condition: a high-to-low transition of sda with scl high is a start condition which must precede any other command (see figure 6-5 on page 8 ). stop condition: a low-to-high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (see figure 6-5 on page 8 ). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in eight bit words. the eeprom sends a zero during the ninth clock cycle to acknowledge that it has received each word (see figure 6-6 on page 8 ). standby mode: the at24cm01 features a low power standby mode which is enabled: ? upon power-up ? after the receipt of the stop bit and the completion of any internal operations software reset: after an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by following these steps: 1. create a start bit condition 2. clock nine cycles 3. create another start bit followed by stop bit condition as in figure 6-1 . the device is ready for the next communication after above steps have been completed. figure 6-1. software reset scl 9 start bit start bit stop bit 8 3 2 1 sda dummy clock cycles
7 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 figure 6-2. bus timing scl: serial clock, sda: serial data i/o figure 6-3. write cycle timing scl: serial clock, sda: serial data i/o notes: 1. the write cycle time t wr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. scl sda in sda out t f t high t low t low t r t aa t dh t buf t su.sto t su.dat t hd.dat t hd.sta t su.sta t wr (1) stop condition start condition word n ack 8 th bit scl sda
8 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 figure 6-4. data validity figure 6-5. start and stop definition figure 6-6. output acknowledge sda scl data stable data stable data change sda scl start stop scl data in data out start acknowledge 9 8 1
9 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 7. device addressing the 1-mbit eeprom requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (see figure 7-1 below). the device address word consists of a mandatory ?1010? sequence for the first four most significant bits. this is common to all 2-wire eeprom devices. the 1-mbit uses the two device address bits, a2 and a1, to allow up to four devices on the same bus. these a2 and a1 bits must compare to the corresponding hardwired input pins, a 2 and a 1 . the a 2 and a 1 pins uses an internal proprietary circuit that biases it to a logic low condition if the pin is allowed to float. the seventh bit (p0) of the device address is a memory page address bit. this memory page address bit is the most significant bit of the data word address that follows. the eighth bit of the device address is the read/write operation select bit. a read operation is initiated if this bit is high and a write operation is initiated if this bit is low. upon a compare of the device address, the eeprom will output a zero. if a valid compare is not made, the device will return to a standby state. figure 7-1. device address 8. write operations byte write: to select a data word in the 1-mbit memory requires a 17-bit word address. the word address field consists of the p0 bit in the device address byte, then the most significant word address followed by the least significant word address (see figure 8-1 ). a write operation requires the p0 bit and two 8-bit data word addresses following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a zero and then the part is to receive the first 8-bit data word. following receipt of the 8-bit data word, the eeprom will output a zero. the addressing device, such as a microcontroller, then must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, t wr , to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 8-1 ). figure 8-1. byte write 1 0 1 0 a2 a1 p0 r/w msb lsb sda line s t a r t w r i t e s t o p device address first word address second word address data m s b a c k p 0 a c k l s b l s b a c k a c k r / w
10 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 page write: the 1-mbit eeprom is capable of a 256-byte page write. a page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to 255 more data words. the eeprom will respond with an acknowledge after each data word is received. the microcontroller must terminate the page write sequence with a stop condition (see figure 8-2 ) and the internally timed write cycle will begin. the data word address lower 8 bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the internally generated word address, reaches the page boundary, the following byte is placed at the beginning of the same page. if more than 256 data words are transmitted to the eeprom, the data word address will ?roll over? and previous data will be overwritten. the address ?rollover? during write is from the last byte of the current page to the first byte of the same page. figure 8-2. page write acknowledge polling: once the internally timed write cycle has started and the eeprom inputs are disabled, acknowledge polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if the internal write cycle has completed will the eeprom respond with a zero, allowing a new read or write sequence to be initiated. data security: the at24cm01 has a hardware data protection scheme that allows the user to write protect the entire memory when the wp pin is at v cc . sda line s t o p s t a r t w r i t e device address first word address second word address data (n) data (n + x) m s b a c k p 0 a c k l s b l s b a c k a c k a c k r / w
11 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 9. read operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. there are three read operations: current address read, random address read, and sequential read. current address read: the internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the v cc to the part is maintained. the address ?rollover? during read is from the last byte of the last page, to the first byte of the first page o f the memory. once the device address with the read/write select bit set to one is input and acknowledged by the eeprom, the current address data word is serially clocked out on the sda line. the microcontroller does not respond with a zero but does generate a following stop condition (see figure 9-1 ). figure 9-1. current address read random read: a random read requires an initial byte write sequence to load in the data word address. this is known as a ?dummy write? operation. once the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word on the sda line. the microcontroller does not respond with a zero but does generate a following stop condition (see figure 9-2 ). figure 9-2. random read sda line s t a r t r e a d s t o p device address data m s b a c k p 0 n o a c k r / w sda line s t a r t s t a r t r e a d w r i t e s t o p device address second word address device address first word address data (n) m s b a c k p 0 a c k a c k l s b a c k n o a c k r / w dummy write p 0 r / w
12 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 sequential read: sequential reads are initiated by either a current address read or a random read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eeprom receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will ?roll over? and the sequential read will continue. the sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (see figure 9-3 ). figure 9-3. sequential read sda line s t a r t s t a r t r e a d w r i t e s t o p device address second word address device address first word address data (n + 1) data (n + 2) data (n + x) data (n) m s b a c k p 0 a c k a c k l s b a c k a c k a c k a c k n o a c k r / w dummy write . . . . . . p 0 r / w
13 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 10. ordering code detail atmel designator product family 24c = standard i 2 c serial eeprom device density shipping carrier option package device grade or wafer/die thickness package option m = megabit family 01 = 1 megabit b or blank = bulk (tubes) t = tape and reel operating voltage m = 1.7v to 5.5v d = 2.5v to 5.5v h = green, nipdau lead finish industrial temperature range (-40c to +85c) u = green, matte sn lead finish industrial temperature range (-40c to +85c) 11 = 11mil wafer thickness ss = jedec soic s = eiaj soic x = tssop u = 3x5 grid array, wlcsp wwu = wafer unsawn at24cm01-sshm-b
14 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 11. part markings drawing no. rev. title catalog number truncation at24cm01 truncation code ##: 2g aaaaaaaa ##% @ atmlhyww 8-lead soic 8-lead tssop aaaaaaa ##% @ athyww 8-lead eiaj aaaaaaaa ##% @ atmlhyww note 2: package drawings are not to scale note 1: designates pin 1 package mark contact: dl-cso-assy_eng@atmel.com 24cm01sm f 3/21/2013 24cm01sm, at24cm01 package marking information date codes voltages y = year ww = work week of assembly % = minimum voltage 2: 2012 6: 2016 02: week 2 m: 1.7v min 3: 2013 7: 2017 04: week 4 d: 2.5v min 4: 2014 8: 2018 ... 5: 2015 9: 2019 52: week 52 country of assembly lot number grade/lead finish material @ = country of assembly aaa...a = atmel wafer lot number h: industrial/nipdau u: industrial/matte tin atmel truncation at: atmel atml: atmel at24cm01: package marking information 8-ball wlcsp %u ## yxx
15 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 12. ordering information notes: 1. b = bulk delivery in tubes: ? soic and tssop = 100 per tube 2. t = tape and reel delivery: ? jedec soic = 4k units per reel ? eiaj soic = 2k units per reel ? tssop and wlcsp = 5k units per reel 3. for wafer sales, please contact atmel sales. atmel ordering code lead finish package voltage operation range at24cm01-sshm-b (1) nipdau (lead-free/halogen-free) 8s1 1.7v to 5.5v industrial temperature (?40 ? c to 85 ? c) at24cm01-sshm-t (2) at24cm01-sshd-b (1) 2.5v to 5.5v at24cm01-sshd-t (2) at24cm01-shm-b (1) 8s2 1.7v to 5.5v at24cm01-shm-t (2) AT24CM01-SHD-b (1) 2.5v to 5.5v AT24CM01-SHD-t (2) at24cm01-xhm-b (1) 8x 1.7v to 5.5v at24cm01-xhm-t (2) at24cm01-xhd-b (1) 2.5v to 5.5v at24cm01-xhd-t (2) at24cm01-uum-t snagcu (lead-free/halogen-free) 8u-6 1.7v to 5.5v at24cm01-wwu11m (3) ? wafer sale package type 8s1 8-lead, 0.150? wide, plastic gull wing small outline (jedec soic) 8s2 8-lead, 0.208? wide, plastic gull wing small outline (eiaj soic) 8x 8-lead, 4.4mm body, plastic thin shrink small outline (tssop) 8u-6 8-ball, 3x5 grid array, wafer level chip scale (wlcsp)
16 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 13. packaging information 13.1 8s1 ? 8-lead jedec soic drawing no. rev. title gpc common dimensions (unit of measure = mm) symbol min nom max note a1 0.10 ? 0.25 a 1.35 ? 1.75 b 0.31 ? 0.51 c 0.17 ? 0.25 d 4.80 ? 5.05 e1 3.81 ? 3.99 e 5.79 ? 6.20 e 1.27 bsc l 0.40 ? 1.27 ? ? 0 ? 8 ? e 1 n top view c e1 end view a b l a1 e d side view package drawing contact: packagedrawings@atmel.com 8s1 g 6/22/11 notes: this drawing is for general information only. refer to jedec drawing ms-012, variation aa for proper dimensions, tolerances, datums, etc. 8s1, 8-lead (0.150? wide body), plastic gull wing small outline (jedec soic) swb
17 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 13.2 8s2 ? 8-lead eiaj soic title drawing no. gpc rev. package drawing contact: packagedrawings@atmel.com 8s2 stn f 8s2, 8-lead, 0.208? body, plastic small outline package (eiaj) 4/15/08 common dimensions (unit of measure = mm) symbol min nom max note notes: 1. this drawing is for general information only; refer to eiaj drawing edr-7320 for additional information. 2. mismatch of the upper and lower dies and resin burrs aren't included. 3. determines the true geometric position. 4. values b,c apply to plated terminal. the standard thickness of the plating layer shall measure between 0.007 to .021 mm. a 1.70 2.16 a1 0.05 0.25 b 0.35 0.48 4 c 0.15 0.35 4 d 5.13 5.35 e1 5.18 5.40 2 e 7.70 8.26 l 0.51 0.85 q 0 8 e 1.27 bsc 3 q q 1 1 n n e e top view t o p v i e w c c e1 e 1 end view e n d v i e w a a b b l l a1 a 1 e e d d side view s i d e v i e w
18 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 13.3 8x ? 8-lead tssop drawing no. rev. title gpc common dimensions (unit of measure = mm) symbol min nom max note a - - 1.20 a1 0.05 - 0.15 a2 0.80 1.00 1.05 d 2.90 3.00 3.10 2, 5 e 6.40 bsc e1 4.30 4.40 4.50 3, 5 b 0.19 ? 0.30 4 e 0.65 bsc l 0.45 0.60 0.75 l1 1.00 ref c 0.09 - 0.20 side view end view top view a2 a l l1 d 1 e1 n b pin 1 indicator this corner e e notes: 1. this drawing is for general information only. refer to jedec drawing mo-153, variation aa, for proper dimensions, tolerances, datums, etc. 2. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. dimension e1 does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. dambar cannot be located on the lower radius of the foot. minimum space between protrusion and adjacent lead is 0.07mm. 5. dimension d and e1 to be determined at datum plane h. package drawing contact: packagedrawings@atmel.com h 8x e 12/8/11 8x, 8-lead 4.4mm body, plastic thin shrink small outline package (tssop) tnr c a1
19 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 13.4 8u-6 ? 8-ball wlcsp ? drawing no. rev. title gpc 8u-6 b 3/15/2013 8u-6, 8-ball wafer level chip scale package (wlcsp) ghz common dimensions (unit of measure = mm) symbol min typ max note a 0.538 a1 0.164 - 0.224 a2 0.280 0.305 0.330 e contact atmel for details e 0.866 e2 0.500 d 1.000 d2 0.500 d contact atmel for details b 0.239 0.269 0.299 package drawing contact: packagedrawings@atmel.com top view side view ball side pin assignment matrix a b c d e 1 2 3 wp a2 v cc sda d e e d ?b pin 1 pin 1 a2 a a1 a ec 3 2 1 3 2 1 d2 e2 scl a1 nc gnd b d a e c bd d 0.015 c a 4x d 0.075 c c j n 0.015 m c j n 0.05 m cab * dimensions are not to scale.
20 atmel at24cm01 [datasheet] atmel-8812e-seeprom-at24cm01-datasheet_032013 14. revision history doc. no. date comments 8821e 03/2013 update document status from preliminary to complete. correct wlcsp pinout. update footers and disclaimer page. 8812d 01/2013 correct tssop pin label 7 to wp. 8812c 12/2012 add wlcsp package. update part markings. update pinout diagram. update part markings. correct byte write figure from second typo error to first word address. update sequential read figure. 8812b 07/2012 correct ordering code: - at24cm01-wwu-11, die sale to at24cm01-wwu11m, wafer sale. update atmel logos and disclaimer page. 8812a 05/2012 initial document release.
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